Wiblocks --- TWI

TWI/TWI.c

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00007 #include <TWI.h>
00008 #include <inttypes.h>
00009 #include <avr/interrupt.h>
00010 #include <avr/io.h>
00011 #include "WConstants.h"
00012 
00013 static unsigned char twi_buf[ TWI_BUFFER_SIZE ]; // Transceiver buffer
00014 static unsigned char twi_msg_size;               // Number of bytes to be transmitted.
00015 static unsigned char twi_state = TWI_NO_STATE;   // State byte. Default set to TWI_NO_STATE.
00016 
00017 union twi_status_reg twi_status_reg = {0};       // TWI_statusReg is defined in TWI_Master.h
00018 
00023 unsigned char twi_busy_p( void ) {
00024   return ( TWCR & (1<<TWIE) ); 
00025 }
00026 
00036 
00037 unsigned char twi_get_state( void ) {
00038   while ( twi_busy_p() );             // Wait until TWI has completed the transmission.
00039   return ( twi_state );               // Return error state.
00040 }
00041 
00054 
00055 void twi_transmit( unsigned char *msg, unsigned char msg_size )
00056 {
00057   unsigned char temp;
00058 
00059   while ( twi_busy_p() );                      // Wait until TWI is ready for next transmission.
00060 
00061   twi_msg_size = msg_size;                     // Number of data to transmit.
00062   twi_buf[0]  = msg[0];                        // Store slave address with R/W setting.
00063   if (!( msg[0] & (TRUE<<TWI_READ_BIT) )) {    // If it is a write operation, then also copy data.
00064     for ( temp = 1; temp < msg_size; temp++ )
00065       twi_buf[ temp ] = msg[ temp ];
00066   }
00067   twi_status_reg.all = 0;      
00068   twi_state         = TWI_NO_STATE ;
00069   TWCR = (1<<TWEN)|                             // TWI Interface enabled.
00070          (1<<TWIE)|(1<<TWINT)|                  // Enable TWI Interupt and clear the flag.
00071          (0<<TWEA)|(1<<TWSTA)|(0<<TWSTO)|       // Initiate a START condition.
00072          (0<<TWWC);                             
00073 }
00074 
00082 
00083 void twi_resend( void )
00084 {
00085   while ( twi_busy_p() );                       // Wait until TWI is ready for next transmission.
00086   twi_status_reg.all = 0;      
00087   twi_state         = TWI_NO_STATE ;
00088   TWCR = (1<<TWEN)|                             // TWI Interface enabled.
00089          (1<<TWIE)|(1<<TWINT)|                  // Enable TWI Interupt and clear the flag.
00090          (0<<TWEA)|(1<<TWSTA)|(0<<TWSTO)|       // Initiate a START condition.
00091          (0<<TWWC);                             
00092 }
00093 
00106 
00107 unsigned char twi_get_data( unsigned char *msg, unsigned char msg_size )
00108 {
00109   unsigned char i;
00110 
00111   while ( twi_busy_p() );              // Wait until TWI is ready for next transmission.
00112 
00113   if( twi_status_reg.last_trans_ok ) { // Last transmission competed successfully.              
00114     for ( i=0; i<msg_size; i++ ) {     // Copy data from Transceiver buffer.
00115       msg[ i ] = twi_buf[ i ];
00116     }
00117   }
00118   return( twi_status_reg.last_trans_ok );                                   
00119 }
00120 
00127 
00128 ISR(TWI_vect) {
00129   static unsigned char twi_buf_ptr;
00130   switch (TWSR)
00131   {
00132     case TWI_START:                             // START has been transmitted  
00133     case TWI_REP_START:                         // Repeated START has been transmitted
00134       twi_buf_ptr = 0;                          // Set buffer pointer to the TWI Address location
00135     case TWI_MTX_ADR_ACK:                       // SLA+W has been tramsmitted and ACK received
00136     case TWI_MTX_DATA_ACK:                      // Data byte has been tramsmitted and ACK received
00137       if (twi_buf_ptr < twi_msg_size) {
00138         TWDR = twi_buf[twi_buf_ptr++];
00139         TWCR = (1<<TWEN)|                       // TWI Interface enabled
00140                (1<<TWIE)|(1<<TWINT)|            // Enable TWI Interupt and clear the flag to send byte
00141                (0<<TWEA)|(0<<TWSTA)|(0<<TWSTO)| 
00142                (0<<TWWC);                         
00143       } else {                                  // Send STOP after last byte
00144          twi_status_reg.last_trans_ok = TRUE;    // Set status bits to completed successfully. 
00145          TWCR = (1<<TWEN)|                       // TWI Interface enabled
00146                 (0<<TWIE)|(1<<TWINT)|            // Disable TWI Interrupt and clear the flag
00147                 (0<<TWEA)|(0<<TWSTA)|(1<<TWSTO)| // Initiate a STOP condition.
00148                 (0<<TWWC);                       
00149       }
00150       break;
00151     case TWI_MRX_DATA_ACK:                      // Data byte has been received and ACK tramsmitted
00152       twi_buf[twi_buf_ptr++] = TWDR;
00153     case TWI_MRX_ADR_ACK:                       // SLA+R has been tramsmitted and ACK received
00154       if (twi_buf_ptr < (twi_msg_size-1) ) {    // Detect the last byte to NACK it.
00155         TWCR = (1<<TWEN)|                       // TWI Interface enabled
00156                (1<<TWIE)|(1<<TWINT)|            // Enable TWI Interupt and clear the flag to read next byte
00157                (1<<TWEA)|(0<<TWSTA)|(0<<TWSTO)| // Send ACK after reception
00158                (0<<TWWC);                        
00159       } else {                                  // Send NACK after next reception
00160         TWCR = (1<<TWEN)|                       // TWI Interface enabled
00161                (1<<TWIE)|(1<<TWINT)|            // Enable TWI Interupt and clear the flag to read next byte
00162                (0<<TWEA)|(0<<TWSTA)|(0<<TWSTO)| // Send NACK after reception
00163                (0<<TWWC);                        
00164       }    
00165       break; 
00166     case TWI_MRX_DATA_NACK:                     // Data byte has been received and NACK tramsmitted
00167       twi_buf[twi_buf_ptr] = TWDR;
00168       twi_status_reg.last_trans_ok = TRUE;      // Set status bits to completed successfully. 
00169       TWCR = (1<<TWEN)|                         // TWI Interface enabled
00170              (0<<TWIE)|(1<<TWINT)|              // Disable TWI Interrupt and clear the flag
00171              (0<<TWEA)|(0<<TWSTA)|(1<<TWSTO)|   // Initiate a STOP condition.
00172              (0<<TWWC);                         
00173       break;      
00174     case TWI_ARB_LOST:                          // Arbitration lost
00175       TWCR = (1<<TWEN)|                         // TWI Interface enabled
00176              (1<<TWIE)|(1<<TWINT)|              // Enable TWI Interupt and clear the flag
00177              (0<<TWEA)|(1<<TWSTA)|(0<<TWSTO)|   // Initiate a (RE)START condition.
00178              (0<<TWWC);                         
00179       break;
00180     case TWI_MTX_ADR_NACK:      // SLA+W has been tramsmitted and NACK received
00181     case TWI_MRX_ADR_NACK:      // SLA+R has been tramsmitted and NACK received    
00182     case TWI_MTX_DATA_NACK:     // Data byte has been tramsmitted and NACK received
00183 //  case TWI_NO_STATE           // No relevant state information available; TWINT = “0”
00184     case TWI_BUS_ERROR:         // Bus error due to an illegal START or STOP condition
00185     default:     
00186       twi_state = TWSR;                                 // Store TWSR and automatically sets clears noErrors bit.
00187                                                         // Reset TWI Interface
00188       TWCR = (1<<TWEN)|                                 // Enable TWI-interface and release TWI pins
00189              (0<<TWIE)|(0<<TWINT)|                      // Disable Interupt
00190              (0<<TWEA)|(0<<TWSTA)|(0<<TWSTO)|           // No Signal requests
00191              (0<<TWWC);                                 //
00192   }
00193 }
00194 
00195
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